A 0.6 Hz full-fledged WiFi-less 29-bit computer based on photon technology. Rather fast. WARNING: May lag. Note: The first part of the default program does not require input. Press the On button and LightPC will print Pascal's Triangle automatically.
light
filt
rllytouch
photon
screen
29bit
touchscreen
computer
processor
electronics
Comments
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@Schmolendevice: What is going to be in there that can make it more compact?
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Hehe, waiting for update 91 so I can make my FILT memory more compact.
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Sorry, with Boolean algebra * is an AND operation, I believe in C and Java, ^ is XOR and technically | (shift + backslash) was OR. I was referring to segments of the Boolean equations for the full adder logic circuit.
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@Schmolendevice Honestly I'm a little lost with your notation, specifically the asterisk in "I always need to pass on the first A * B and A ^ B to some DTEC so I can OR the A * B with the Carry In OR (A ^ B)." ARAY/FILT technology in fact allows addition to be done in constant time (so 0 frames per bit) by manipulating the algebra a little.
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Here's the ID for that one unless I have to publish it. I'm not fully familiar with 'private save sharing.' ID:1703470. Notes in scene.
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I have a high speed 30 Hz barrel shifter but for some reason it seems like DTEC possibly also has a speed limit to how fast it can transfer BRAY ctypes to FILT which would just crush my dreams of multi core TPT computers.
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12/28/14 (cont'd) ...since it doesn't fully seem possible to get a full adder FILT circuit to propagate both the sum and carry in one frame. I always need to pass on the first A * B and A ^ B to some DTEC so I can OR the A * B with the Carry In OR (A ^ B). If you have a solution, then solid spark would probably be a great help. Photons might do but may still be limited by a 2-frame latency. I'd beed a way to send new BRAY signals to a DTEC _every_ frame.
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@mecha-man Well here's the version I posted recently which works at 8 frames per bit. ID:1702484. Sometime soon I'll post a sample of how I get the 30 Hz FILT/BRAY updating. But yeah I'd like some help with solid spark stability since it seems to commonly just stop working when I open the save again. Either way I'd rather have a more compact way to get 30 Hz signals instead of 60 Hz signals
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@Schmolendevice: Could I see it please, I seem to have a way with making solid spark, layering and other "magic" things work. Also it sounds much better than my version, which works at 8 frames per bit.
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I'm presently working on a FILT/BRAY 2 frames per bit adder but sadly all the synchronized PSTN has made it less compact than I hoped. Solid spark isn't reliable enough and probably the timing wouldn't work. Anyways my plan is to take two of the devices, offset them by a frame and use DRAY to attempt to 'pipeline' their calculations for 1 frame ber pit calculations.