Difference between revisions of "Memory"
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The details of organization on real memory modules s. a. DDR is not actual inside this context. To make primitive ALU Needed ~2x binary 8bit blocks of temporary memory and one for executor cache. | The details of organization on real memory modules s. a. DDR is not actual inside this context. To make primitive ALU Needed ~2x binary 8bit blocks of temporary memory and one for executor cache. | ||
− | == Ierarhy == | + | === Ierarhy === |
# BlockChain | # BlockChain | ||
## Block | ## Block | ||
Line 14: | Line 14: | ||
##### Com - component of value | ##### Com - component of value | ||
− | == Interfaces == | + | === Interfaces === |
For ceil, block and blockchain(common): | For ceil, block and blockchain(common): | ||
− | MOP( | + | ; MOP(MVO) |
− | + | : Add(1)&sub(0) | |
− | OPeration | + | ; OPeration |
− | + | : Add(1)&sub(0) | |
− | LS | + | ; LS |
− | + | : listof channels eq. Length of ceils | |
− | + | : Logic bits(sCOM) (MOP & OP 1/0) - sparked when out ouf range | |
+ | {{ save | id=3186559 }} | ||
+ | |||
+ | === Schems === | ||
+ | ==== Introduction to Digit ==== | ||
+ | Numbers - chars, - presentation. | ||
+ | |||
+ | '''Codings''': | ||
+ | * ''Original'' (Natural equiv. series, - on fingers) | ||
+ | Two states(1 bit) of origin - access to next ceil will be opened by each charged orig. | ||
+ | - Serial communication. | ||
+ | [[File:NATURAL_EQUIV.gif]] [[File:NATURAL_EQUIV1.gif]] | ||
+ | |||
+ | * ''Cryptographic'' | ||
+ | # Positional - access to next ceil will be opened by each charge seria | ||
+ | ## binary - Dual volume seria | ||
+ | ## octa | ||
+ | ## decimal | ||
+ | ## hexadecimal | ||
+ | |||
+ | ---- | ||
+ | |||
+ | === Addition === | ||
+ | {{ save | id=3186936 }} |
Latest revision as of 09:01, 16 December 2024
Contents
[hide]Introduction
Inside TPT You can find a long list of constructive solutions typeof "data storage" in order to allow signals to be reserved into other forms only. Instead of storage, - memory(RAM) - it is blockchains of vectorized, managed memory based on transitive P-N logic(math and energy) usable by ALU.
The details of organization on real memory modules s. a. DDR is not actual inside this context. To make primitive ALU Needed ~2x binary 8bit blocks of temporary memory and one for executor cache.
Ierarhy
- BlockChain
- Block
- Ceil
- Item - volume
- Origin - communicator
- Com - component of value
- Item - volume
- Ceil
- Block
Interfaces
For ceil, block and blockchain(common):
- MOP(MVO)
- Add(1)&sub(0)
- OPeration
- Add(1)&sub(0)
- LS
- listof channels eq. Length of ceils
- Logic bits(sCOM) (MOP & OP 1/0) - sparked when out ouf range
Schems
Introduction to Digit
Numbers - chars, - presentation.
Codings:
- Original (Natural equiv. series, - on fingers)
Two states(1 bit) of origin - access to next ceil will be opened by each charged orig. - Serial communication.
- Cryptographic
- Positional - access to next ceil will be opened by each charge seria
- binary - Dual volume seria
- octa
- decimal
- hexadecimal