Some FILT RAM I made. Based on Schmolendevice's BitStormer preview. TODO: remove the delay at the address input.
digital
memory
electronic
initiald
Comments
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MAN! We REALLY have some amazing electrnic saves on FP, right now! +9999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999e + 10(27), btw.
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Thats what all of us have been waiting for, more subframe people.
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I can't wait untill someone makes a subframe super computer out of these amazing breakthroughs. Almost all the time, there is a subframe thing on fp now.
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QuanTech: Actualy works. hehe... im done.
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-1 does not work when you drop DEST on it (jk +1)
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For the address delay, what I did was start with the DTEC sitting to the left of the first, topmost ARAY, and in the next frame push it down, next to powered PSCN. That way, the DTEC propagates in the right position before the ARAY do. "PSTN-based Particle ID Coaxing (PPIC)."
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@Draco712 Ah yes, now I remember. Both of our methods are valid although I'd suggest looking into my design on how to make it a touch "thinner"; I'd vie your copying of the dynamically produced PSCN from under the FILT and then to the right above the PSTN is redundant.
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I would love to see this in use somewhere...
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@Schmolendevice, the delay is caused by the ARAYs firing first *before* the DTEC has a chance to change the ctypes of FILT. (Layered btw)
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that's some initial-D stuff right there