Some FILT RAM I made. Based on Schmolendevice's BitStormer preview. TODO: remove the delay at the address input.
digital
memory
electronic
initiald
Comments
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@Draco712 As for the address input's "single/next frame delay", I'm not sure what version of my FRAMs you used as reference, but your setup is most similar to what I have used here (id:1930216) which (as far as I remember) can respond "instantly" so long as the counter ctype is supplied from above. Ah, it's likely with the timing and positioning of the DRAY and CONV that copies over the PSCN to the PSTN DMUX; look into how I set my DMUX up, the PSCN comes from the right and is copied once.
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For those new to subframe, I'd recommend looking at LBPHacker and mark2222's saves addressing the topic as well as my introductory forum article at https://powdertoy.co.uk/Discussions/Thread/View.html?Thread=19943. It's a wonderful world.
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What is this subframe stuff? I don't understand it at all.
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where I can see the instruction on a subframe ?
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For single volume FRAMs that don't do the aforementioned "mass pushing" (consider the theoretical performance overhead of having to reposition so many particles), I am thinking of having a moving PSTN arm with variable temperature vertical PSTN copied into its head each frame that creates a temporary "opening" in the FRAM for BRAY to propagate from the desired cell. This would require committing the "sin" of high-tmp2 DTEC (>4) to retrieve the ctype.
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Actually, you can see if the randomizer is truly random, if you use Persistent display (3) to see if the piston "restores" the persistence, and if its consistent. I see good results.
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address connected to a incrementor, write mode set to true(ctype 15) and output is drayed to the write input.
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why does pink dot (FILT with ctype 1) appear?
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hmmmm.... id:2200091
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Cool and good. I might use it later. +1