FTC-Sigma's instruction set by xiaohei_5753
Still working on the compiler =(.
Comments
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Aaay 9th Dec 2023
After more reasearching, the 0x15 and 0x16 is basically a right and left bit shift operator respectively. To use it basically use a number with the power of 2 for [b] to bit shift by how much and any number for [a] -
LUA 13th Nov 2023
What do instructions 0x15 and 0x16 do? -
Aaay 30th Sep 2023So uhh can someone tell me what the hexadecimal code is for below the commands/instructions?
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Furry_02 31st Jan 2023
@xiaohei_5753: Also, what is your memory layout? It seems that the computer has one, as the a, b, and c, values are completely nonsensical if you treat them as purely RAM addresses. -
Furry_02 31st Jan 2023@xiaohei_5753: Could you explain the example program in the original save? Because it makes no sense. There are no instructions that read or write to cache, but the cache still is written to?? What?? How do you even read from cache in the first place??? Nothing about this computer makes any sense.
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RaconTPT 3rd Jan 2023
bitewise not is "~a" instead of "a!" -
xiaohei_5753 28th Dec 2022
@Furry_02 :A,B,C are all addresses. For example, 0x18010203 means to add the data stored at 0x01 to the data stored at 0x02 and write it to 0x03. -
Furry_02 14th Dec 2022@xiaohei_5753
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Furry_02 12th Dec 2022Question, what are A and B? Registers? Immediates? Some other kind of input? A and B seem to have no way of setting them, and the diagram is more confusing than it is helpful. C is obviously a register from context. Also, how is the cache supposed to be used? I see no way of writing to it, only reading, which makes no sense, because that's not how cache works in my experience. Is the cache written to from somewhere else? If so, what is written to it?
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xiaohei_5753 4th Dec 2022@ :The upper RAM and the lower CPU are independent, so the CPU controls RAM by sending messages to RAM.If CPU output 0x11******,the RAM will perform the operation"read [add]".(******=[add])