(forgive me but you're going to have to learn to think within electrical-lengths for a bit)

There isn't enough space within the save "Id:1291661" to clearly explain how It's going to operate and im finally asking for a little help.

The idea is since electricitys maximum propagational speed is 2Px/frame along with there being 8 positive(followed by negative) Px that means that between 16Px of the activator, 8Px of negative or positive buffered by a following "null" (semi-empty) overflow thats double-electrical-length-buffered (for the negative overflow) its possible to attach a "time signature" to the individual header bytes, within 2Px.(no room for error)

So, basically the "time" of the activation is 16Px or 8Frames. 8 of which are positive followed by 8 negative. The activation pulse can't carry data with it. Immidiately after the negative of the activator begins the timer on the first Bit. It has to be activated instantly for A, after 1 frame/2Px for B, 2 frame/4Px for C and 3 frames/6Px. It can be detected with AND-logic along a non-INST wire. Im hoping 4 frames/8Px can be used as the last bit to determine if the number is positive or negative but I dont yet know if its possible.

The point of doing this is for compressions sake, I've yet to see someone program with the length of the electrical signals being used in this way. It means for the transfer of the numbers 0-3&4-7 there would only be 1 frame/2Px difference. 0-7 could all be transferred using only a single electrical signal! (After the Activation header of course.)

#|Bin#|2-Bit representation

0|0000:DD
1|0001:DC
2|0010:DB

3|0011:DA

4|0100:CD

5|0101:CC

6|0110:CB

7|0111:CA

8|1000:AD

9|1001:AC

(Null bytes)

A|1010:AB
Etc..

Key; activation-header:byte-pair#1.byte-pair#2

0-7 are unique in their own way. Transferring DD| (0) as 1:00.00 uses no electrical signal at all.

DC| is 1:00.01 and uses the first possible activator available within 1:00.xx

Skipping to 4 CD| that would be 1:01:00 and would uses the first possible activator within 1:xx.00

And A| (Even as a null bit) (1010) as 1:10.10 uses the third of four possible detector sets across both byte pairs.

I would really love to see this machine built, it attributes time-signatures to bits and is really complex!

10 days later, breakthrough. Project success. I've made what is probably the hardest part, the decrement detector. Now I just have to make it's other half the ROM-out that transcribes 0-9 as DD-AC.

I was right to note there was no room for error, even using Dlay it was time-consuming to get right. Anyway the final leap came when i figured the function lied in a timed latch-gate. I was fortuanate to catch on as fast as i did.
 The other models tried to detect decriment-1 timing and while they had limited success they proved one thing in the end. it was possible to detect half-decrement timing alone with logic.

I believe the power of these lies with using them in paralell. Transferring(data) with multiple of these width-detector cells would result in a tremendous banwidth if used correctly. And can (at least in theory?) be used to increase power driving things like processor components!