This is the first ever TPT 32-bit Processor. Very fast!
INSTRUCTION SET FOR TPT 32-BIT PROCESSOR
Instruction format:[0000000] [000] [000] [0000 0000 0000 0000 0000 0000 0000 0000]
There's 8 registers in the processor. A, B, C, D, E, F, G and V. Also two flags: C and Z. C is set when the adder makes a carry and Z is set when the result is zero.
[0000000]
Stores instruction code. Instruction code as belows:
0000000 Add. Sets Z and C.
0110000 NEW No Operation (NOP)
1110000 Xor. Sets Z.
0111000 Subtract. Sets Z and C.
0001100 Compare. The same as subtract without storing the result. Z = equal and C = greater than or equal.
1000010 AND. Sets Z.
0001010 OR. Sets Z.
1111010 Read Memory while #2 = address. Value is stored in #1.
1010110 Write Memory while #2 = address and #1 is value to be written.
PLEASE NOTE THAT THE BELOW INSTRUCTIONS HAS BEEN INCREMENTED TO FIX A BUG.
0011110 Jump while #1 = address.
1111110 Jump if C. (Used with compare; Greater than or equal)
1000001 Jump if NC or Z. (Used with compare; Less than or equal)
0010001 Jump if C and NZ. (Used with compare; Greater than)
1110001 Jump if NC. (Used with compare; less than)
1001001 Jump if Z. (Used with compare; equal)
1101001 Jump if NZ. (Used with compare; not equal)
1011001 NEW STDOUT
1111111 TERMINATE
[000] [000]
Stores two register. First one is #1, Second one is #2.
000 = A, 001 = B, 010 = C, 011 = D, 100 = E, 101 = F, 110 = G, 111 = V.
Usually the result is stored in #1.
[0000 0000 0000 0000 0000 0000 0000 0000]
Stores the value. Always writes to V when the command is executed.
Sample program calculates 32 Fibonacci sequence
ADD D,10000
ADD A,1
l:
; write the value into RAM
RAMW A,D
; B := B + A
ADD B,A
; exchange A and B
XOR A,B
XOR B,A
XOR A,B
; decrease the counter (default 32)
SUB D,1
; loop if counter is not zero
JZ l
; counter is zero
END
Would you like to make a program for this?
!set type warp conv
-1
Lol, you're too serious...
DID YOU LIE?????
About I understand this? Yes.
EDIT: It don't work