I'm not sure if you've seen some of the designs I've presently posted. I myself am in the extensive process of developing what may be some of the fastest devices TPT has ever seen. Essentially aside from normal FILT operations I've also worked to use sub-frame timing and stock CONV, DRAY and CRAY mechanics to produce binary counters, high capacity FILT memory devices and 16-bit adders which at all capable of running at 60 Hz (one operation per frame).

In simple terms, to answer your question of "So, what kind of performance benefit could be gained by using FILT operators?" I have to say ridiculous amounts. For example in a classic 2-frame per bit adder, my designs will be able to perform 32 additions in the time it takes to perform one 16-bit 'classic electronics' addition. Plus if you've heard of 2's complement, that's all you need to turn the exact same addition circuit into a 60 Hz 'subtractor.'

Here's my promotion save for my current 'A3SFTT' (Advanced Solid-Spark Sub-Frame Timing Technology) technology if you're interested: id:1778279.

Oh, and having a tmp for 16-bit addition, 2's complement conversion, multiplication and integer division would be absolutely wonderful but in a way be 'cheating.'

I think the biggest advantage is not having to make a large bus to transfer information. Instead of using 8, 16, 29 wires, all we need is 1. How's the progress going btw, Schmolendevice?

Well, I've managed to achieve some 'breakthroughs' in my memory device designs plus I've developed a crazy DRAY contraption that will allow me to conduct 60 Hz goto operations. id:1741431. I've also managed to make a 6-bit PSTN DMUX using only 11 active PSTN (one unused). I am still yet to finish setting up this 256 PSTN 2D 60 Hz FRAM.