*See update info at bottom of post.*

This thread details my present advancements in achieving the design, development and implementation of TPT's first 60 Hz (60 read/write accesses per second) 2D FRAM, or a Random Access Memory device capable of having FILT particle data storage units arranged and accessed in rows and columns at high speeds.

The save - A3SFTT Demonstration 3: 

ID:1835083

Included in this save are my previous two technologies, the 60 Hz FRAM with 60 Hz programming capability and the same device hooked up to perform 20 Hz GOTO operations (in terms of computer programming, this device is only capable of performing a 'jump' between different computer 'instructions' every three frames; 60 Hz / 3 = 20 Hz). Centered in the middle is my latest technology featuring a 60 Hz capable 4 by 64 FILT particle FRAM device. It features a brand new compacted PSTN DMUX (selects column addresses; original concept adapted from mecha-man) which reduces the 32 'active PSTN' 6-bit DMUX (can address up to 64 addresses) down to only 11 'active PSTN.' Furthermore a 'bulky' device at the bottom of the setup relays addresses up to the PSTN DMUX 60 times a second. Lastly, I devised a 'simple' 60 Hz vertical read/write arm for selecting and gaining access to individual rows.

The principle behind this size reduction is a simple exploitation of the fact that with sub frame timing, sparked PSCN can be arranged beside PSTN close together without interfering with each other. With this, (if you understand PSTN mechanics and binary) I had the extension by 32 by simulated by adding together 11, 10, 6 and 5. 16 was produced out of 9 and 7. Then 8, 4, 2 and 1 remained as they were. The result was a much more compact and thinner DMUX that in the future could make 256 to 512 column FILT memories a reality.

I call this device 'double volume' in that it takes up twice the number of FILT particles than is actually accessible. I believe that the original idea for this type of '2D FRAM' came from LBPHacker in his "Ray162k" computer save where the actual 'access space' was separated from the 'storage space' with this use of DRAM. Using my major advancements from the previous A3SFTT demonstrations (the design of 60 Hz PSTN DMUXs that can move reading/writing arms or any electronics including CONV-based solid-spark 'contraptions' with the help of DMND) I managed to set up two parallel PSTN arms which continuously copy down columns of four FILT particles from the storage space to the access space at the address selected from the previous frame. After this 'copy down,' within the same frame a set of four ARAY from the left illuminate the entire access space whose BRAY propagates straight to the right read/write access arm. That exact frame, a DTEC on the arm propagates the currently read ctype down through a long line of FILT through which the data can be accessed. The horizontal PSTN arms regulate which column is being accessed while the vertical PSTN arm regulates which row is read or programmed. Following that there are many more details to be revealed in future official MS Word A3SFTT tech documents.

How to use it:

In the center above the white box you will see two buttons saying "Start" and "Stop." Sparking these will do as stated, sending a signal to the "CPU skeleton's" Front-Side Bus 'Access Bus' setting the device to 'Execution Mode.' As per the immediate frame at which the CPU receives this mode ctype, execution will ONLY start during the FOLLOWING frame. This is called 'next-frame operation' in contrast to 'immediate' or 'current frame operation.'

Once execution begins, the CPU's program counter will begin incrementing and the addresses it produces will become evident in the movement of the FRAM's access arms. When you hover on each FILT particle you will be able to see a visual representation of its 'ctype,' or a set of colour bands that represent the 'bits' of its binary 30-bit ctype. All will have a red band to the left which allows the FILT to retain a 'zero' while those which have a green band within it constitute a 'GOTO operation.' Each GOTO operation FILT possesses this green band as well as an 8-bit binary number (in blue) to the rightmost part of the FILT ctype visual representing the intended 'GOTO address.' The GOTO address states the address (memory location/FILT pixel) the CPU should jump to. During the immediate frame a GOTO address is read and decoded from FRAM, the GOTO will be propagated and in exactly the next frame, the FRAM will jump to the desired address. During the frame where the instruction at the GOTO address is executed, the PC, or Program Counter, will have already stored the new address and have had incremented to the addressing following if not issued another GOTO operation at the GOTO location. In the frame following, the FRAM will either move to the next, consecutive address in memory or jump to yet another location without hanging in the current location at all, thus rendering this device 60 Hz GOTO capable.

Implications of this technology: 

What this means for TPT is that we can now have this high a density of FILT memory in so small a space running at so high a speed. As per 60 Hz GOTO capability, this means that TPT's future computers will be able to run programs without any extra delays caused by the need of changing the current address stored in the PC. As be the size of the current set up, you can already see that the addition of an 8-bit or 16-bit adder to the device will merely increase its length yet have virtually no effect on its width. Hence, these devices will be very compact allowing you to fit practically up to four individual CPU 'cores' together in one save without invoking too much lag. Hence yes, quad-core CPUs in Powder Toy are in fact viable.

*New update to FRAM device!*: As of 8/13/15 I have added a new and relatively nice interface for performing manual to high speed IO with the CPU FRAM. Most of the instructions will be in the save itself written in my hand-anti-aliased 'SCHM Sans Serif.' The update essentially allows you to press buttons which automatically push the CPU into different access modes: Standby, Program Execution (Run), Programming, Device Access (Reading), Address Set and Clear.

To the top right are input terminals for sending values into the CPU's Front-Side Bus inputs. Sparking input submits the 24-bit data to the Address or Data buses respectively. Standby mode ensures the CPU does absolutely nothing. Initiating Run mode causes the CPU to begin executing instructions and GOTO operations starting from the current address stored in the program counter. Address Set manually sets the program counter to the last address submitted to the CPU FSB Address Bus. Program and Access set the CPU to read and write mode with manual data input and address set. On Program mode, as long as Data Input is submitted to the bus, that data will be stored on a next-frame basis to the current memory address. On Access mode and Program mode, the submitted address will not be entered into the program counter unless Address Set is selected once.

Pressing "++" allows you to quickly increment to the next address without exiting Program or Access mode. Fast Read or Fast Write are like fast forward operations that read or write every frame with the PC continuously incrementing. You can only stop this 'fast forward' operation by pressing any of the other modes. By default, "++" for one frame will activate an input flag for one frame to increment the current address by one then in the following frame immediately resume the original mode. "++" will not work while Address Set is selected (you essentially try to increment the address once but after that Address Set immediately moves it back where it was).

*Programming*: The CPU currently only supports GOTO operations. To store a GOTO operation at any location, set the 3rd byte's first bit to 1 and the first byte to the desired 8-bit GOTO address (most significant bit left(MSBL/LSBR)). After that press Program. Following that you may or may not return to Standby before pressing "++" to program the next location or Address Set to move to some other arbitrary location.

More info on A3SFTT and SCHM: https://powdertoy.co.uk/Discussions/Thread/View.html?Thread=19943