Hey guise!

I'm working on introducing a new idea to the existing AI technologies in TPT. 

Background:

NAND and NOR gates are called "universal" gates, because, in principle, you can recreate any of the used logic gates with the proper combination of several NAND or NOR gates.

Example: An 'AND' gate made of 'NOR' gates.

An example of the usefulness of this feature is that the Apollo Guidance Computer was built solely of NOR gates. (https://en.wikipedia.org/wiki/Apollo_Guidance_Computer)

If we used a reprogrammable network of NOR gates, we'd hopefully be able to create much more compact and complex AI chips than the current YES/NO gate stack ones. My current approach to the aim is to create layers of NOR gates, which are connected by (separately) reprogrammable switches. This way, with each reset, we get different sets of logic gates. This could be used to make a trial-and-error learning AI.

Demonstration:

EDIT:

Demo 2: Prototype NOR-AI chip, containing 16 NOR gates and 36 switches. This can generate most of the commonly used logic gates. The chip is rigged to proofreaders and a frame bot.