G-I8M7D28S Documentation

  • Sam_Hayzen
    20th Oct 2019 Member 1 Permalink
    The Guardian I8M7D28S is a moderately-sized computer that's able to run at one cycle per frame, 60hz when TPT is running at full speed, and is the first machine in the Guardian series of computer-processors.

    Vocabulary:
    Instructionlets - A subsection of an instruction byt- I mean word with domain over a certain type of operation.

    Memory:
    The G-I8M7D28S is harvard arc., meaning that its Instruction Memory and Data Memory is seperate.
    The machine's Instruction ROM is 256 byt- I mean words in size, meaning it can store 256 instructions.
    The Data RAM is 128 byt- I mean words in total, meaning it can store 128 28-bit numbers.

    The G-I8M7D28S is not able to load Instruction Memory as Data.

    Input/Output:
    The G-I8M7D28S has two input/output channels. There are two input ports, and two output ports, named "In 0", "in 1", "out 0", "out 1"
    Both the output ports are on the bottom and fire a BRAY encoded with data upon encountering an "out 0" or "out 1" instructionlet.
    Both the input ports are on the top and passively read the spectra of whatever's above them.

    Hardware:
    The G-I8M7D28S has only three hardware registers. These registers are:
    A - The Arithmetic Register, 28-bit, used for addition and subtraction
    L - The Logic Register, 28-bit, used for bitwise logic
    SP - Stack Pointer, 28-bit, used for stack operations

    The data bus of the G-I8M7D28S is not cleared between cycles, and is therefore used as a psuedo-register.

    Due to an oversight when developing the machine's instruction set, the only way to indirectly access memory at an arbitrary address is through the stack pointer. So, in larger applications, the Stack Pointer is used less as a stack pointer, and more as an unconventional index register.

    Instructions:
    In one G-I8M7D28S is two 8-bit immediate values (Called IP and P) and four instructionlets.
    The instructionlets are the "Memory", "Adder", "Logic", and "Control" instruction.
    All four of these instructionlets are executed in one instruction in the order listed above.
    In total, the G-I8M7D28S can execute 240 operations in one second. Though, this is not considered as 240 instructions in one second as they are not interchangeable.

    IP and P are referenced as registers, but are immediate data drawn from instruction byt- I mean words.

    TPTAsm support:
    Thanks to @LBPHacker, the G-I8M7D28S has TPTAsm support, which has been very useful in making demo programs and putting the machine to use.

    In TPTAsm, the common Tesla/Guardian mnemonics have been deprecated in favor of simpler expressions. On top of this, there was an attempt move away from all references of the bus.
    Instructions are divided by line and instructionlets are divided by the pipe '|' character.

    Instruction Architecture:
    Instruction byt- I mean word breakdown:
    111111111111
    BA9876543210FEDCBA9876543210 - Bit#
    [------][------][-][-][-][-]
    | | | | | |
    | | | | | |Control Instructions
    | | | | |LU Instruction
    | | | |AU Instruction
    | | |Mem Instructions
    | |P
    |IP

    Operation Breakdowns
    Memory Instruction
    |Decimal
    | |Hexidecimal
    | | |Binary
    | | | |Mneumonic
    | | | |
    | | | | |tptasm mnemonic
    |00|0|000|NOP |~
    |01|1|001|POP BUS |pop
    |02|2|010|LD SP,BUS |stsp
    |03|3|011|PUSH BUS |push
    |04|4|100|LD BUS,(P) |ld [address]
    |05|5|101|PUSH IP |puship
    |06|6|110|LD (P),BUS |st [address]
    |07|7|111|PUSH P |pushi [value]


    AU Instruction
    |Decimal
    | |Hexidecimal
    | | |Binary
    | | | |Mneumonic
    | | | |
    | | | | |tptasm mnemonic
    |00|0|000|NOP |~
    |01|1|001|LD A,BUS |sta
    |02|2|010|DEC BUS |dec
    |03|3|011|INC BUS |inc
    |04|4|100|SUB BUS,P |subi [value]
    |05|5|101|ADD BUS,P |addi [value]
    |06|6|110|SUB BUS,A |sub
    |07|7|111|ADD BUS,A |add


    LU Instruction
    |Decimal
    | |Hexidecimal
    | | |Binary
    | | | |Mneumonic
    | | | |
    | | | | |tptasm mnemonic
    |00|0|000|NOP |~
    |01|1|001|OR BUS,L |or
    |02|2|010|AND BUS,L |and
    |03|3|011|XOR BUS,L |xor
    |04|4|100|RR BUS |rr
    |05|5|101|RL BUS |rl
    |06|6|110|LD BUS,RNG |rng
    |07|7|111|LD L,BUS |stl

    Control Instruction
    |Decimal
    | |Hexidecimal
    | | |Binary
    | | | |Mneumonic
    | | | |
    | | | | |tptasm mnemonic
    |00|0|000|NOP |~
    |01|1|001|JP BUS |jpb
    |02|2|010|JP z,P |jz/jnz
    |03|3|011|JP c,P |jc/jnc
    |04|4|100|OUT BUS,0 |out 0
    |05|5|101|IN BUS,0 |in 0
    |06|6|110|OUT BUS,1 |out 1
    |07|7|111|IN BUS,1 |in 1
     

    Main debut save:



    [Starship Rogue] demo game:


    (Source Code Assembly)
    Edited 3 times by Sam_Hayzen. Last: 20th Oct 2019