Looking for compact SPRK stabilizer.
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So for a native power source (BTRY for instance) you can be sure of a stable SPRK supply (4 ticks on, 4 ticks off). But for generators using the least amount of "cheat materials" (in this case photons hitting PSCN/NSCN through glass), there's often a case of 5 - 7 gaps instead of 4.
What I'm looking for is the most compact way to mitigate this either by breaking the circuit if the next power wave takes longer than 4 ticks, or some kind of buffer to keep things flowing during that one or two extra ticks. The key word here is compact - how small can a stabilizer mechanism be without breaking effectiveness?
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I think you should try using LITH, like, you have multiple PSCN/NSCN sources, you connect them to a shared LITH accumulator and then you make an output to that accumulator.
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Just tried it, just one problem:
How do you regulate accumulated charge? There doesn't seem to be a way to measure how much it has since DTEC is the only thing that can detect ctype, but LITH's ctype is a number not an element (ie if I put ctype 80 using PROP it is set to detect C02).
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Try serialisation.
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How do you serialize LITH's ctype?
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If you want to generate a certain number of SPRK,s you can use PSCN/DRAY to replace an uncharged LITH pixel with a charged LITH pixel that you've preset to the desired ctype. LITH's ctype goes down a number for every SPRK it generates.
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A Lithium capacitor might be able to solve the issue. I have a design for one that works fairly well. Basically, using a DLAY mechanism to control the SPRK input into the capacitor one way and another to control the SPRK output, maybe with a lower temp than the input DLAY mechanism, might be able to solve the issue. If it doesn't, you could most likely modify the capacitor design until it works the way you need it to.
